Rajit Manohar, Ph.D., M.S., B.S., California Institute of Technology

Rajit Manohar's picture
John C. Malone Professor of Electrical Engineering and Computer Science
Address: 
10 Hillhouse Avenue, Dunham 504, New Haven, CT 06511
203.432.7040

Rajit Manohar is part of the Computer Systems Lab at Yale.

He primarily works on asynchronous VLSI design and architecture. He is also interested in a number of other subjects including concurrency, formal methods, programming language semantics, information theory, and cognitive systems.

Representative Publications

  • Sandra Jackson and Rajit Manohar. Gradual Synchronization. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2016.
  • Rajit Manohar. Comparing Stochastic and Deterministic Computing. IEEE Computer Architecture Letters, 2015.
  • Rajit Manohar and Yoram Moses. Analyzing Isochronic Forks with Potential Causality. IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2015.
  • Stephen Longfield and Rajit Manohar. Removing Concurrency for Rapid Functional Verification. Proceedings of the 2014 International Conference on Computer-Aided Design (ICCAD), November 2014.
  • Paul A. Merolla, John V. Arthur, Rodrigo Alvarez-Icaza, Andrew S. Cassidy, Jun Sawada, Filipp Akopyan, Bryan L. Jackson, Nabil Imam, Chen Guo, Yutaka Nakamura, Bernad Brezzo, Ivan Vo, Steven K. Esser, Rathinakumar Appuswamy, Brian Taba, Arnon Amir, Myron D. Flickner, William P. Risk, Rajit Manohar, and Dharmendra Modha. A Million Spiking-Neuron Integrated Circuit with a Scalable Communication Network and Interface. Science, 345(6197):668–673, August 2014.
  • Benjamin Tang, Sunil Bhave, and Rajit Manohar. Low Power Asynchronous VLSI with NEM Relays. Proceedings of the 20th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2014.
  • Stephen Longfield and Rajit Manohar. Inverting Martin Synthesis for Verification. Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2013.
  • Robert Karmazin, Carlos Otero, and Rajit Manohar. CellTK: Automated Layout for Asynchronous Circuits with Nonstandard Cells. Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2013.
  • Benjamin Tang, Stephen Longfield, Sunil Bhave, and Rajit Manohar. A Low Power Asynchronous GPS Baseband Processor. Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), May 2012.
  • Paul Merolla, John Arthur, Filipp Akopyan, Nabil Imam, Rajit Manohar, Dharmendra Modha. A Digital Neurosynaptic Core Using Embedded Crossbar Memory with 45pJ per Spike in 45nm. Proceedings of the IEEE Custom Integrated Circuits Conference (CICC), September 2011.
  • Basit Riaz Sheikh and Rajit Manohar. An Operand-Optimized Asynchronous IEEE 754 Double-precision floating-point adder. Proceedings of the IEEE International Symposium on Asynchronous Circuits and Systems, May 2010.
  • S. Ramaswamy, L. Rockett, D. Patel, S. Danziger, R. Manohar, C. Kelly, J. Holt, V. Ekanayake, D. Elftmann. A Radiation Hardened Reconfigurable FPGA. Proceedings of the IEEE Aerospace Conference, March 2009.
  • David Fang, Filipp Akopyan, and Rajit Manohar. Self-Timed Thermally Aware Circuits. IEEE Computer Society Annual Symposium on VLSI, March 2006.
  • Song Peng, David Fang, John Teifel, and Rajit Manohar. Automated Synthesis for Asynchronous FPGAs. 13th ACM International Symposium on Field Programmable Gate Arrays, February 2005.
  • Rajit Manohar and K. Mani Chandy. Δ-Dataflow Networks for Event Stream Processing. Proceedings of the IASTED International Conference on Parallel and Distributed Computing and Systems, November 2004.
  • John Teifel and Rajit Manohar. Static Tokens: Using Dataflow to Automate Concurrent Pipeline Synthesis. Proceedings of the 10th International Symposium on Asynchronous Circuits and Systems, April 2004.
  • John Teifel and Rajit Manohar. Programmable Asynchronous Pipeline Arrays. Proceedings of the 13th International Conference on Field Programmable Logic and Applications, Lisbon, Portugal, September 2003.
  • Clinton Kelly IV and Rajit Manohar. An Event-Synchronization Protocol for Parallel Simulation of Large-Scale Wireless Networks. Seventh IEEE International Symposium on Distributed Simulation and Real Time Applications, October 2003.
  • Clinton Kelly IV, Virantha Ekanayake, and Rajit Manohar. SNAP: A Sensor Network Asynchronous Processor. Proceedings of the Ninth International Symposium on Asynchronous Circuits and Systems, Vancouver, BC, May 2003.
  • Rajit Manohar and Clinton Kelly, IV. Network on a Chip: Modeling Wireless Networks with Asynchronous VLSI. IEEE Communications Magazine, November 2001.
  • Rajit Manohar. Width-Adaptive Data Word Architectures. Proceedings of the 19th Conference on Advanced Research in VLSI, Salt Lake City, Utah, March 2001.
  • Rajit Manohar, Tak-Kwan Lee, and Alain J. Martin. Projection: A Synthesis Technique for Concurrent Systems. Proceedings of the Fifth International Symposium on Advanced Research in Asynchronous Circuits and Systems, April 1999.
  • Rajit Manohar and José A. Tierno. Asynchronous Parallel Prefix Computation. IEEE Transactions on Computers, 47(11):1244–1252, November 1998.
  • Rajit Manohar and Alain J. Martin. Slack Elasticity in Concurrent Computing. Proceedings of the Fourth International Conference on the Mathematics of Program Construction, Lecture Notes in Computer Science 1422, pp. 272-285, Springer-Verlag 1998.
  • Alain J. Martin, Andrew Lines, Rajit Manohar, Mika Nyström, Paul Penzes, Robert Southworth, Uri V. Cummings, and Tak-Kwan Lee. The Design of an Asynchronous MIPS R3000 microprocessor. Proceedings of the 17th Conference on Advanced Research in VLSI, pp. 164–181, September 1997.
  • José A. Tierno, Rajit Manohar, and Alain J. Martin. The Energy and Entropy of VLSI Computations. Proceedings of the Second International Symposium on Advanced Research in Asynchronous Circuits and Systems. March 1996.
  • Rajit Manohar and Alain J. Martin. Quasi-delay-insensitive circuits are Turing-complete. Invited article, Second International Symposium on Advanced Research in Asynchronous Circuits and Systems. March 1996. Available as Caltech technical report CS-TR-95-11, November 1995.