Mark Hill, University of Wisconsin-Madison
Host: Abhishek Bhattacharjee
Title: Accelerator-level Parallelism: Mobile SoCs as Harbinger of the Future
The thesis of this talk is that many future computer systems will need to exploit accelerator-level parallelism (ALP) that is a new level of parallelism above bit-, instruction-, data-, and thread-level parallelism. ALP is the only known way to continue needed performance increases under constant power without (much) technology scaling. Since ALP is currently deployed in mobile systems-on-a-chip (SoCs), we discuss these SoCs and present a model—called Gables—to frame early SoC design understanding. Specifically, Gables extends Roofline’s bottleneck analysis to multi-accelerator SoCs. We conclude with a call to action for the community to make ALP more broadly effective via better techniques for accelerator selection, scheduling, communication choreographing, and productive programming. This talk is based on HPCA 2019’s Industrial Session paper and forthcoming submission, both with Vijay Janapa Reddi of Harvard.
Mark D. Hill is John P. Morgridge Professor and Gene M. Amdahl Professor of Computer Sciences at the University of Wisconsin-Madison, where he also has a courtesy appointment in Electrical and Computer Engineering. His research interests include parallel-computer system design, memory system design, and computer simulation. He received the 2019 Eckert-Mauchly Award and is a fellow of IEEE and the ACM. He serves as Chair of the Computer Community Consortium (2018-19) and served as Wisconsin Computer Sciences Department Chair 2014-2017. Hill has a PhD in computer science from the University of California, Berkeley.